 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| a Low Cost, High Performance Voltage Feedback, 325 MHz Amplifiers AD8057/AD8058 CONNECTION DIAGRAMS (TOP VIEWS) SOT-23-5 (RT-5) VOUT 1 -VS 2 +IN 3 (Not to Scale) 4 FEATURES Low Cost Single (AD8057) and Dual (AD8058) High Speed 325 MHz, -3 dB Bandwidth (G = +1) 1000 V/ s Slew Rate Gain Flatness 0.1 dB to 28 MHz Low Noise 7 nV/Hz Low Power 5.4 mA/Amplifier Typical Supply Current @ +5 V Low Distortion -85 dBc @ 5 MHz, RL = 1 k Wide Supply Range from 3 V to 12 V Small Packaging AD8057 Available in SOIC-8 and SOT-23-5 AD8058 Available in SOIC-8 and SOIC APPLICATIONS Imaging DVD/CD Photodiode Preamp A-to-D Driver Professional Cameras Filters PRODUCT DESCRIPTION SO-8 (SOIC) NC 1 -IN 2 +IN 3 8 7 6 AD8057 5 +VS NC +VS VOUT NC -IN -VS 4 AD8057 (Not to Scale) 5 NC = NO CONNECT RM-8 ( SOIC) SO-8 (SOIC) OUT1 -IN1 +IN1 -VS 1 2 3 4 (Not to Scale) AD8058 8 7 6 5 +VS OUT2 -IN2 +IN2 5 4 3 2 GAIN - dB 1 0 -1 G = +5 -2 -3 G = +10 -4 -5 1 10 100 FREQUENCY - MHz 1000 G = +2 G = +1 The AD8057 (single) and AD8058 (dual) are very high performance amplifiers with a very low cost. The balance between cost and performance make them ideal for many applications. The AD8057 and AD8058 will reduce the need to qualify a variety of specialty amplifiers. The AD8057 and AD8058 are voltage feedback amplifiers with the bandwidth and slew rate normally found in current feedback amplifiers. The AD8057 and AD8058 are low power amplifiers having low quiescent current and a wide supply range from 3 V to 12 V. They have noise and distortion performance required for high-end video systems as well as dc performance parameters rarely found in high speed amplifiers. The AD8057 and AD8058 are available in standard SOIC packaging as well as tiny SOT-23-5 (AD8057) and SOIC (AD8058). These amplifiers are available in the industrial temperature range of -40C to +85C. Figure 1. Small Signal Frequency Response REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999 AD8057/AD8058-SPECIFICATIONS unless otherwise noted) Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Conditions G = +1, VO = 0.2 V p-p G = -1, VO = 0.2 V p-p G = +1, VO = 2 V p-p G = +1, VO = 0.2 V p-p G = +1, VO = 2 V Step, R L = 2 k G = +1, VO = 4 V Step, R L = 2 k G = +2, VO = 2 V Step fC = 5 MHz, VO = 2 V p-p, RL = 1 k fC = 20 MHz, VO = 2 V p-p, RL = 1 k f = 5 MHz, VO = 2 V p-p, RL = 150 f = 5 MHz, VO = 2.0 V p-p f = 5 MHz, G = +2 f = 100 kHz f = 100 kHz NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 1 k NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 1 k VIN = 200 mV p-p, G = +1 (@ TA = +25 C, VS = 5 V, RL = 100 , RF = 0 , Gain = +1, Min AD8057/AD8058 Typ Max 325 95 175 30 850 1150 30 -85 -62 -68 -35 -60 7 0.7 0.01 0.02 0.15 0.01 30 1 2.5 3 0.5 3.0 5 Units MHz MHz MHz MHz V/s V/s ns dBc dBc dB dBm dB nV/Hz pA/Hz % % Degree Degree ns mV mV V/C A A A dB dB M pF V dB V V pF V mA mA dB Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion SFDR Third Order Intercept Crosstalk, Output to Output Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error Overload Recovery DC PERFORMANCE Input Offset Voltage TMIN -T MAX Input Offset Voltage Drift Input Bias Current TMIN -T MAX Input Offset Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current for AD8057 Quiescent Current for AD8058 Power Supply Rejection Ratio Specifications subject to change without notice. 2.5 0.75 VO = 2.5 V, RL = 2 k VO = 2.5 V, RL = 150 50 50 55 52 10 2 +Input RL = 1 k VCM = 2.5 V RL = 2 k RL = 150 30% Overshoot -4.0 48 -4.0 +4.0 60 +4.0 3.9 30 6.0 6.0 14.0 59 1.5 VS = 5 V to 1.5 V 54 2.5 7.5 15 -2- REV. A AD8057/AD8058 SPECIFICATIONS (@ T = +25 C, V = +5 V, R = 100 A S L , RF = 0 , Gain = +1, unless otherwise noted) Min AD8057/AD8058 Typ Max 300 155 28 700 35 -75 -54 -60 7 0.7 0.05 0.05 0.10 0.02 1 2.5 3 0.5 3.0 50 45 55 52 10 2 0.9 to 3.4 60 0.9 to 4.1 1.2 to 3.8 30 3.0 6.0 5.4 13.5 58 10.0 7.0 14 5 Units MHz MHz MHz V/s ns dBc dBc dB nV/Hz pA/Hz % % Degree Degree mV mV V/C A A A dB dB M pF V dB V V pF V mA mA dB Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion Crosstalk, Output to Output Input Voltage Noise Input Current Noise Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage Conditions G = +1, VO = 0.2 V p-p G = +1, VO = 2 V p-p VO = 0.2 V p-p G = +1, VO = 2 V Step, R L = 2 k G = +2, VO = 2 V Step fC = 5 MHz, VO = 2 V p-p, RL = 1 k fC = 20 MHz, VO = 2 V p-p, RL = 1 k f = 5 MHz, G = +2 f = 100 kHz f = 100 kHz NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 1 k NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 1 k TMIN-TMAX Input Offset Voltage Drift Input Bias Current TMIN-TMAX Input Offset Current Open-Loop Gain INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Capacitive Load Drive POWER SUPPLY Operating Range Quiescent Current for AD8057 Quiescent Current for AD8058 Power Supply Rejection Ratio Specifications subject to change without notice. 2.5 0.75 VO = 1.25 V, RL = 2 k VO = 1.25 V, RL = 150 +Input RL = 1 k VCM = 2.5 V RL = 2 k RL = 150 30% Overshoot 48 VS = 2.5 V to 1.5 V 54 REV. A -3- AD8057/AD8058 ABSOLUTE MAXIMUM RATINGS 1 MAXIMUM POWER DISSIPATION Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V Internal Power Dissipation2 Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . 0.8 W SOT-23-5 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 W SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 4.0 V Output Short Circuit Duration . . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves Storage Temperature Range (R) . . . . . . . . . -65C to +125C Operating Temperature Range (A Grade) . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . +300C NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Specification is for device in free air: 8-Lead SOIC Package: JA = 160C/W 5-Lead SOT-23-5 Package: JA = 240C/W 8-Lead SOIC Package: JA = 200C/W The maximum power that can be safely dissipated by the AD8057/AD8058 is limited by the associated rise in junction temperature. Exceeding a junction temperature of +175C for an extended period can result in device failure. While the AD8057/AD8058 is internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (+150C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves. 2.0 MAXIMUM POWER DISSIPATION - Watts TJ = +150 C 1.5 8-LEAD SOIC PACKAGE 1.0 SOIC 0.5 SOT-23-5 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 AMBIENT TEMPERATURE - C 70 80 90 Figure 2. Plot of Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model AD8057AR AD8057ACHIPS AD8057AR-REEL AD8057AR-REEL7 AD8057ART-REEL AD8057ART-REEL7 AD8058AR AD8058ACHIPS AD8058AR-REEL AD8058AR-REEL7 AD8058ARM AD8058ARM-REEL AD8058ARM-REEL7 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Descriptions 8-Lead Narrow Body SOIC Die 8-Lead SOIC, 13" Reel 8-Lead SOIC, 7" Reel 5-Lead SOT-23, 13" Reel 5-Lead SOT-23, 7" Reel 8-Lead Narrow Body SOIC Die 8-Lead SOIC, 13" Reel 8-Lead SOIC, 7" Reel 8-Lead SOIC 8-Lead SOIC, 13" Reel 8-Lead SOIC, 7" Reel Package Options SO-8 Waffle Pak SO-8 SO-8 RT-5 RT-5 SO-8 Waffle Pak SO-8 SO-8 RM-8 RM-8 RM-8 Brand Code Standard N/A Standard Standard H7A H7A Standard N/A Standard Standard H8A H8A H8A CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8057/AD8058 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE -4- REV. A Typical Performance Characteristics- AD8057/AD8058 4.5 4.0 3.5 OUTPUT VOLTAGE 3.0 2.5 2.0 1.5 1.0 0.5 0 10 100 1k LOAD RESISTANCE - 10k 100k ABS (-) OUTPUT VOLTS (+) OUTPUT VOLTAGE 0.0 -1.5V SWING RL = 150 -0.5 -1.0 -2.5V SWING RL = 150 -1.5 -2.0 -2.5 -3.0 -3.5 -4.0 -4.5 -5.0 -40 -30 -20 -10 0 10 20 30 40 TEMPERATURE - C 50 60 70 80 85 -5V SWING RL = 150 Figure 3. Output Swing vs. Load Resistance Figure 6. Negative Output Voltage Swing vs. Temperature 6 -3.0 -3.5 4 -4.0 -4.5 -ISUPPLY - mA VOS - mV -5.0 -5.5 -6.0 -6.5 -7.0 -7.5 -8.0 -40 -30 -20 -10 0 10 20 30 40 TEMPERATURE - C 50 60 70 80 85 -6 -40 -30 -20 -10 0 10 20 30 40 TEMPERATURE - C 50 60 70 80 -4 -ISUPPLY @ 5V -I SUPPLY @ 1.5V 2 VOS @ 0 VOS @ 1.5V 5V -2 Figure 4. -ISUPPLY vs. Temperature Figure 7. VOS vs. Temperature 5.0 4.5 +5V SWING RL = 150 4.0 3.5 3.0 VOLTS 2.5 2.0 +2.5V SWING RL = 150 1.5 1.0 +1.5V SWING RL = 150 0.5 0.0 -40 -30 -20 -10 0 10 20 30 40 TEMPERATURE - C 50 60 70 80 85 AVOL - mV/V 3.5 3.0 AVOL @ 5V 2.5 2.0 1.5 AVOL @ 2.5V 1.0 0.5 0 -40 -30 -20 -10 0 10 20 30 40 TEMPERATURE - C 50 60 70 80 85 Figure 5. Positive Output Voltage Swing vs. Temperature Figure 8. Open-Loop Gain vs. Temperature REV. A -5- AD8057/AD8058 -Typical Performance Characteristics 0.00 -0.10 0.01 F -0.20 -0.30 IB - A -0.40 +IB @ -0.50 -0.60 -0.70 +IB @ -I B @ -I B @ 5V 1.5V 5V 0.01 F 2.5V -I B @ 2.5V +IB @ 1.5V -VS 0.001 F HP8130A PULSE GENERATOR TR/TF = 1ns VIN 50 0.001 F VOUT +VS 4.7 F AD8057/58 4.7 F 1k -0.80 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 85 TEMPERATURE - C Figure 9. Input Bias Current vs. Temperature Figure 12. Test Circuit G = +1, RL = 1 k for Figures 13 and 14 4 100mV 3 PSRR @ PSRR - mV/V 1.5V 5V 20mV/ DIV 2 1 0 -40 -30 -20 -10 -100mV 0 10 20 30 40 TEMPERATURE - C 50 60 70 80 85 4ns/DIV Figure 10. PSRR vs. Temperature Figure 13. Small Signal Step Response G = +1, RL = 1 k, VS = 5 V 0 5V -10 -20 PSRR - dB -PSRR VS = -30 +PSRR VS = -40 2.5V 2.5V 1V/DIV -50 -5V 1 10 FREQUENCY - MHz 100 1000 4ns/DIV -60 0.1 Figure 11. PSRR vs. Frequency Figure 14. Large Signal Step Response G = +1, RL = 1 k, VS = 5.0 V -6- REV. A AD8057/AD8058 1k +VS 4.7 F 5 4 3 0.01 F HP8130A PULSE GENERATOR TR/TF = 1ns VIN 1k 50 0.001 F VOUT 4.7 F 0.01 F 0.001 F 1k 2 GAIN - dB 1 0 -1 G = +5 -2 -3 G = +10 -4 -VS -5 1 10 100 FREQUENCY - MHz 1000 G = +2 G = +1 AD8057/58 Figure 15. Test Circuit G = -1, RL = 1 k for Figures 16 and 17 Figure 18. Small Signal Frequency Response, VOUT = 0.2 V p-p 100mV 5 4 3 2 GAIN - dB 20mV/ DIV 0V 1 0 -1 -2 -3 G = +5 G = +1 G = +2 -100mV 4ns/DIV -4 -5 1 G = +10 10 100 1000 FREQUENCY - MHz Figure 16. Small Signal Step Response G = -1, RL = 1 k Figure 19. Large Signal Frequency Response, VOUT = 2 V p-p 5V 5 4 3 2 1V/DIV GAIN - dB 1 0 -1 -2 G = -5 -3 -5V 4ns/DIV -4 -5 1 G = -10 10 100 FREQUENCY - MHz 1000 G = -2 G = -1 Figure 17. Large Signal Step Response G = -1, RL = 1 k Figure 20. Large Signal Frequency Response REV. A -7- AD8057/AD8058 0.5 0.4 0.3 0.2 GAIN - dB 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 1 10 100 FREQUENCY - MHz 1000 VOUT = 0.2V G = +2 RL = 1.0k RF = 1.0k 5.0 4.5 RISE TIME AND FALL TIME - ns 4.0 3.5 3.0 2.5 2.0 FALL TIME 1.5 RISE TIME 1.0 0.5 0.0 0 1 2 VOUT - V p-p 3 4 Figure 21. 0.1 dB Flatness G = +2 Figure 24. Rise Time and Fall Time vs. VOUT. G = +1, RL = 1 k, R F = 0 -50 5 -60 THD 2ND -80 3RD -90 RISE TIME AND FALL TIME - ns 4 DISTORTION - dBc -70 3 RISE TIME 2 FALL TIME 1 -100 -110 0.1 1 10 FREQUENCY - MHz 100 0 0 1 2 VOUT - V p-p 3 4 Figure 22. Distortion vs. Frequency, RL = 150 Figure 25. Rise Time and Fall Time vs. VOUT. G = +2, RL = 100 , R F = 402 -40 VOUT = -1V TO + 1V OR +1V TO -1V G = +2 RL = 100 /1k 0.4% -50 DISTORTION - dBc 20MHz 0.3% 0.2% 0.1% -60 0.0% -0.1% 5MHz -70 -0.2% -0.3% -0.4% -80 0.0 0 0.4 0.8 1.2 1.6 2.0 2.4 VOUT - V p-p 2.8 3.2 3.6 4.0 10 20 30 40 50 60 TIME - ns Figure 23. Distortion vs. VOUT @ 20 MHz, 5 MHz, RL = 150 , VS = 5.0 V Figure 26. Settling Time -8- REV. A AD8057/AD8058 1.8V INPUT SIGNAL 2.5V OUTPUT RESPONSE 500mV/ DIV 200mV/ DIV INPUT SIGNAL = 0.6V 0V VS = 2.5V RL = 1k G = +1 OUTPUT SIGNAL 1.7V VS = 2.5V R1 = 1k G = +4 20ns/DIV 20ns/DIV Figure 27. Input Overload Recovery, VS = 2.5 V Figure 30. Output Overload Recovery, VS = 2.5 V 4.5V VS = 5.0V RL = 1k G = +1 INPUT SIGNAL 5V 5.0V 1V/DIV OUTPUT SIGNAL = 4.0V 500mV/ DIV VS = 5.0V R1 = 1k G = +4 0V 20ns/DIV 20ns/DIV 37ns Figure 28. Output Overload Recovery, VS = 5.0 V Figure 31. Output Overload Recovery, VS = 5.0 V 0 -10 0 -20 -20 CROSSTALK - dB -40 CMRR - dB -30 -60 SIDE B DRIVEN -80 SIDE A DRIVEN -40 -50 -60 -100 -70 0.1 1 10 FREQUENCY - MHz 100 -120 0.1 1 10 FREQUENCY - MHz 100 Figure 29. CMRR vs. Frequency Figure 32. Crosstalk (Output-to-Output) vs. Frequency REV. A -9- AD8057/AD8058 0.015 0.010 0.005 0.000 -0.005 -0.010 -0.015 DIFFERENTIAL PHASE (Degrees) 0.00 0.00 0.02 0.03 0.05 0.07 0.09 0.10 0.11 0.12 0.13 DIFFERENTIAL GAIN (%) 0.00 -0.00 0.00 0.00 -0.00 -0.00 -0.00 -0.00 -0.00 -0.00 -0.00 VS = 5.0V RL = 150 0.01 0.00 -0.01 -0.02 -0.03 -0.04 -0.05 DIFFERENTIAL PHASE (Degrees) 0.00 0.01 0.03 0.05 0.07 0.09 0.11 0.12 0.12 0.13 0.13 DIFFERENTIAL GAIN (%) 0.00 -0.00 -0.00-0.01 -0.01 -0.01 -0.01 -0.01 -0.02 -0.03 -0.04 VS = +5V RL = 150 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 VS = 5.0V RL = 150 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 VS = +5V RL = 150 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th a. DIFFERENTIAL GAIN (%) 0.00 0.00 0.00 0.01 0.01 0.00 0.00 0.00 -0.00 -0.01 -0.01 VS = 5.0V RL = 1k a. DIFFERENTIAL GAIN (%) 0.00 0.01 -0.00-0.01 -0.01 -0.01 -0.02 -0.02 -0.03 -0.04 -0.05 VS = +5V RL = 1k 0.015 0.010 0.005 0.000 -0.005 -0.010 -0.015 0.01 0.00 -0.01 -0.02 -0.03 -0.04 -0.05 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 DIFFERENTIAL PHASE (Degrees) 0.00 0.00 0.00 -0.00 -0.00 -0.00 -0.01 -0.01 -0.01 -0.01 -0.01 VS = 5.0V RL = 1k 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0.00 -0.02 DIFFERENTIAL PHASE (Degrees) 0.00 -0.00 0.00 0.00 -0.00 -0.00 -0.00 -0.00 -0.01 -0.01 -0.02 VS = +5V RL = 1k 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th 1st 2nd 3rd 4th 5th 6th 7th 8th 9th 10th 11th b. Figure 33. Differential Gain and Differential Phase One Back Terminated Load (150 ) (Video Op Amps Only) b. Figure 35. Differential Gain and Differential Phase a. RL = 150 , b. RL = 1 k 180 100 135 80 OPEN-LOOP GAIN - dB PHASE - Degrees 90 60 10 VNOISE - nV/ Hz 45 40 0 20 1 -45 0 -90 0.01 0.1 1 10 FREQUENCY - MHz 100 -20 1000 0.1 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M 100M Figure 34. Open-Loop Gain and Phase vs. Frequency Figure 36. Voltage Noise vs. Frequency -10- REV. A AD8057/AD8058 100 100 10 INOISE - pA/ Hz 10 ZOUT - 1 1 0.1 0.1 0.1 10 100 1k 10k 100k FREQUENCY - Hz 1M 10M 100M 1 10 FREQUENCY - MHz 100 1000 Figure 37. Current Noise vs. Frequency Figure 38. Output Impedance vs. Frequency APPLICATIONS Driving Capacitive Loads Table I. Recommended Value for Resistors R S, RF, RG vs. Capacitive Load, C L, Which Results in 30% Overshoot When driving a capacitive load, most op amps will exhibit overshoot in their pulse response. Figure 39 shows the relationship between the capacitive load that results in 30% overshoot and closed loop gain of an AD8058. It can be seen that, under the Gain = +2 condition, the device is stable with capacitive loads of up to 69 pF. In general, to minimize peaking or to ensure device stability for larger values of capacitive loads, a small series resistor, RS, can be added between the op amp output and the load capacitor, CL, as shown in Figure 40. For the setup shown in Figure 40, the relationship between RS and CL was empirically derived and is shown in Table I. 500 Gain 1 2 3 4 5 10 RF 100 100 100 100 100 100 RG 100 50 33.2 25 11 CL w/RS = 0 11 51 104 186 245 870 RF +2.5V 0.1 F 10 F CL w/RS = 2.4 13 69 153 270 500 1580 RG AD8058 400 VIN = 200mV p-p 50k CL - pF 300 0.1 F RS FET PROBE VOUT CL 10 F 200 RS = 2.4 100 RS = 0 0 1 2 3 CLOSED-LOOP GAIN 4 5 200mV 100mV -2.5V Figure 40. Capacitive Load Drive Circuit + OVERSHOOT 29.0% Figure 39. Capacitive Load Drive vs. Closed-Loop Gain -100mV -200mV 100mV 50ns/DIV Figure 41. Typical Pulse Response with CL = 65 pF, Gain = +2, and VS = 2.5 V REV. A -11- AD8057/AD8058 Video Filter Differential A-to-D Driver Some composite video signals that are derived from a digital source contain some clock feedthrough that can cause problems with downstream circuitry. This clock feedthrough is usually at 27 MHz, which is a standard clock frequency for both NTSC and PAL video systems. A filter that passes the video band and rejects frequencies at 27 MHz can be used to remove these frequencies from the video signal. Figure 42 shows a circuit that uses an AD8057 to create a single +5 V supply, three-pole Sallen-Key filter. This circuit uses a single RC pole in front of a standard two-pole active section. To shift the dc operating point to midsupply, ac coupling is provided by R4, R5 and C4. C2 680pF RF 1k +5V + 10 F As system supply voltages are dropping, many A-to-D converters provide differential analog inputs to increase the dynamic range of the input signal, while still operating on a low supply voltage. Differential driving can also reduce second and other even-order distortion products. Analog Devices offers an assortment of 12- and 14-bit high speed converters that have differential inputs and can be run from a single +5 V supply. These include the AD9220, AD9221, AD9223, AD9224 and AD9225 at 12 bits, and the AD9240, AD9241, and AD9243 at 14 bits. Although these devices can operate over a range of common-mode voltages at their analog inputs, they work best when the common-mode voltage at the input is at the midsupply or 2.5 V. Op amp architectures that require upwards of 2 V of headroom at the output have significant problems when trying to drive such A-to-Ds while operating with a +5 V positive supply. The low headroom output design of the AD8057 and AD8058 make them ideal for driving these types of A-to-D converters. The AD8058 can be used to make a dc-coupled, single-endedto-differential driver for one of these A-to-Ds. Figure 44 is a schematic of such a circuit for driving an AD9225, a 12-bit, 25 MSPS A-to-D converter. 1k +5V + 10 F 50 VINA REF +2.5V + 10 F +5V +5V C4 0.1 F C3 36pF R4 10k R5 10k 2 0.1 F 7 6 R1 200 R2 499 C1 100pF R3 49.9 3 AD8057 4 Figure 42. Low-Pass Filter for Video 0.1 F 0.1 F Figure 43 shows a frequency sweep of this filter. The response is down 3 dB at 5.7 MHz, so it passes the video band with little attenuation. The rejection at 27 MHz is 42 dB, which provides more than a factor of 100 in suppression of the clock components at this frequency. 10 1k VIN 1k 0V 3 8 AD8058 2 1k 1 AD9225 1k 0 -10 LOG MAGNITUDE - dB -20 1k 6 1k AD8058 5 4 7 50 VINB 0.1 F + 10 F -30 -40 -50 -60 -70 -80 -90 100k -5V 1k Figure 44. Schematic Circuit for Driving AD9225 1M 10M FREQUENCY - Hz 100M Figure 43. Video Filter Response In this circuit, one of the op amps is configured in the inverting mode, while the other is in the noninverting mode. However, to provide better bandwidth matching, each op amp is configured for a noise gain of 2. The inverting op amp is configured for a gain of -1, while the noninverting op amp is configured for a gain of +2. Each of these produces a noise gain of 2, which is only determined by the inverse of the feedback ratio. The input signal to the noninverting op amp is divided by 2 in order to normalize its level and make it equal to the inverting output. -12- REV. A AD8057/AD8058 For zero volts input, the outputs of the op amps want to be at 2.5 V, which is the midsupply level of the A-to-D. This is accomplished by first taking the 2.5 V reference output of the A-to-D and dividing it by two by a pair of 1 k resistors. The resulting 1.25 V is applied to each op amp's positive input. This voltage is then multiplied by the gain of 2 of the op amps to provide a 2.5 V level at each output. The assumption for this circuit is that the input signal is bipolar with respect to round and the circuit must be dc coupled. This implies the existence of a negative supply elsewhere in the system. This circuit uses -5 V as the negative supply for the AD8058. If the AD8058 negative supply were tied to ground, there would be a problem at the input of the noninverting op amp. The input common-mode voltage can only go to within 1 V of the negative rail. Since this circuit requires that the positive inputs operate with a 1.25 V bias, there is not enough room to swing this voltage in the negative direction. The inverting stage does not have this problem, because its common-mode input voltage remains fixed at 1.25 V. If dc-coupling is not required, various ac-coupling techniques can be used to eliminate this problem. Layout The AD8057 and AD8058 are high speed op amps and should be used in a board layout that follows standard high speed design rules. All the signal traces should be as short and direct as possible. In particular, the parasitic capacitance on the inverting input of each device should be kept to a minimum to avoid excessive peaking and other undesirable performance. The power supplies should be bypassed very close to the power pins of the package with 0.1 F in parallel with a larger, approximately 10 F tantalum capacitor. These capacitors should be connected to a ground plane that is either on an inner layer, or fills the area of the board that is not used for other signals. REV. A -13- AD8057/AD8058 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead SOIC (RM-8) 0.122 (3.10) 0.114 (2.90) 8-Lead Narrow Body SOIC (SO-8) C3388a-0-9/99 0.0196 (0.50) x 45 0.0099 (0.25) 8 0 0.0500 (1.27) 0.0160 (0.41) 0.1968 (5.00) 0.1890 (4.80) 8 1 5 4 8 5 0.122 (3.10) 0.114 (2.90) 0.199 (5.05) 0.187 (4.75) 1 4 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27 PIN 1 0.0098 (0.25) 0.0040 (0.10) 0.0688 (1.75) 0.0532 (1.35) 0.0500 0.0192 (0.49) SEATING (1.27) 0.0098 (0.25) PLANE BSC 0.0138 (0.35) 0.0075 (0.19) 0.028 (0.71) 0.016 (0.41) 5-Lead Surface Mount (SOT-23) (RT-5) 0.1181 (3.00) 0.1102 (2.80) 0.0669 (1.70) 0.0590 (1.50) PIN 1 5 1 2 4 3 0.1181 (3.00) 0.1024 (2.60) 0.0374 (0.95) BSC 0.0748 (1.90) BSC 0.0512 (1.30) 0.0354 (0.90) 0.0059 (0.15) 0.0019 (0.05) 0.0197 (0.50) 0.0138 (0.35) 0.0571 (1.45) 0.0374 (0.95) SEATING PLANE 10 0 0.0079 (0.20) 0.0031 (0.08) 0.0217 (0.55) 0.0138 (0.35) -14- REV. A PRINTED IN U.S.A. |
Price & Availability of AD8057
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |